Description

  • Pure Hardware Structure – FPGA
  • All in One Design.
  • Seamless Switching – Auto EDID – 5ms
  • Bezel Compensation with Scaler
  • Multiple users / rights management Character Superimposition, Scrolling Text (opt)
  • Signal Preview (Optional)
  • Independent 2 Layers signal
  • RS-232 in / out support
  • Easy manage with TCP/IP

FEATURES

  • Pure Hardware Structure – FPGA
  • All in One Design.
  • Seamless Switching – Auto EDID – 5ms
  • Bezel Compensation with Scaler
  • Multiple users / rights management Character Superimposition, Scrolling Text (opt)
  • Signal Preview (Optional)
  • Independent 2 Layers signal
  • RS-232 in / out support
  • Easy manage with TCP/IP

Specification

Connection Diagram

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